Assembly and Hardware
This section showcases my experiments with the M86HC11E and SSBC architectures, Verilog hardware simulations of state machines and latches, and hardware maintenance samples.
"Wave.s" is an M86HC11E program designed for the CME11-E9-EVBU board (PW link HACK) to generate a 30% high square wave, viewable on an oscilloscope. It demonstrates physical assembly architecture and an interrupt service routine.
"Doubling.ssbc" tests Peter W.'s SSBC assembly machine, demonstrating direct memory mapping and recursive subroutine calls by reading input "n" and assigning "f(n)" to another port.
"Doubling.cpp" replicates this behavior in C++ for better understanding.
Click here to see the SSBC source repository and web interpreter.
This experiment explores finite state machines in Verilog. Mealy designs output on transitions, while Moore designs output based on state.
"FSM.v" contains the state machine implementations.
"FSM_tb.v" provides test data for GTKWave, visualizing finite state machine behavior through waveforms.
This experiment explores Verilog data latches, including a D-flip-flop with reset and a Johnson counter. It also demonstrates combining latches for advanced data storage.
"Latches.v" contains the latch implementations.
"Latches_tb.v" provides test data for GTKWave, visualizing finite state machine behavior through waveforms.
This experiment covers computer maintenance, including cleaning and reapplying thermal paste on an NVidia ASUS ROG STRIX GTX 1080 GPU and an Intel LGA 1151 CPU.
The process involves disassembling the GPU backplate, reapplying thermal paste, and reassembling.
I unmounted the water cooling system on my Intel LGA 1151 socket to reapply thermal paste to the CPU.